IEICE SEARCH SYSTEM

Warning: gethostbyaddr() [function.gethostbyaddr]: Address is not a valid IPv4 or IPv6 address in /var/www/html/bin/log.php on line 177

Warning: gethostbyaddr() [function.gethostbyaddr]: Address is not a valid IPv4 or IPv6 address in /var/www/html/bin/log.php on line 179
IEICE SEARCH SYSTEM

Keyword : low power dissipation

A 12-bit 3.7-Msample/s Pipelined A/D Converter Based on the Novel Capacitor Mismatch Calibration Technique Shuaiqi WANG Fule LI Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/09/01 Vol. E91-A No. 9 pp. 2465-2474 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Electronic Circuits and Systems Keyword: A/D conversion, pipelined, capacitor mismatch calibration, low power dissipation,
	Summary \| Full Text:PDF (966.5KB)

A 15-bit 10-Msample/s Pipelined A/D Converter Based on Incomplete Settling Principle Shuaiqi WANG Fule LI Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/10/01 Vol. E89-A No. 10 pp. 2732-2739 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Modelling, Systems and Simulation Keyword: A/D conversion, pipelined, incomplete settling, low power dissipation,
	Summary \| Full Text:PDF (781.3KB)

Generation of Test Sequences with Low Power Dissipation for Sequential Circuits Yoshinobu HIGAMI Shin-ya KOBAYASHI Yuzo TAKAMATSU
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2004/03/01 Vol. E87-D No. 3 pp. 530-536 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSI) Category: Test Generation and Compaction Keyword: LSI testing, sequential circuit, test generation, low power dissipation, stuck-at fault,
	Summary \| Full Text:PDF (175.8KB)

High-Speed Low-Power CMOS Pipelined Analog-to-Digital Converter Ri-A JU Dong-Ho LEE Sang-Dae YU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/06/20 Vol. E82-A No. 6 pp. 981-986 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1998 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '98)) Category: Keyword: analog-to-digital conversion, pipelined analog-to-digital conversion, low power dissipation, operational amplifier sharing,
	Summary \| Full Text:PDF (1.1MB)

Adaptive Speed Control of a General-Purpose Processor Based on Activities Sanehiro FURUICHI Toru AIHARA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/09/20 Vol. E81-C No. 9 pp. 1481-1483 Type of Manuscript: Special Section LETTER (Special Issue on Novel VLSI Processor Architectures) Category: Keyword: general-purpose processor, low power dissipation, low-power design, performance tradeoff, high performance,
	Summary \| Full Text:PDF (224.8KB)

Device-Deviation Tolerant Elastic-Vt CMOS Circuits with Fine-Grain Power Control Capability Masayuki MIZUNO Hitoshi ABIKO Koichiro FURUTA Isami SAKAI Masakazu YAMASHINA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/09/20 Vol. E81-C No. 9 pp. 1463-1472 Type of Manuscript: Special Section PAPER (Special Issue on Novel VLSI Processor Architectures) Category: Keyword: low-threshold voltage, leakage current, supply-voltage fluctuation, supply-voltage control, low power dissipation,
	Summary \| Full Text:PDF (972.4KB)

A Low Power Dissipation Technique for a Low Voltage OTA Eitake IBARAGI Akira HYOGO Keitaro SEKINE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/02/20 Vol. E81-A No. 2 pp. 237-243 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques in the Digital-Oriented Era) Category: Keyword: analog signal processing, MOS analog circuit, MOS OTA, low voltage power supply, low power dissipation,
	Summary \| Full Text:PDF (580.9KB)

Design Methodology of Deep Submicron CMOS Devices for 1 V Operation Hisato OYAMATSU Masaaki KINUGAWA Masakazu KAKUMU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/12/20 Vol. E79-C No. 12 pp. 1720-1725 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power LSI Technologies) Category: Keyword: low voltage, low power dissipation, threshold voltage, CMOS,
	Summary \| Full Text:PDF (466.2KB)

A New Array Architecture for 16 Mb DRAMs with Special Page Mode Masaki TSUKUDE Tsukasa OISHI Kazutami ARIMOTO Hideto HIDAKA Kazuyasu FUJISHIMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/10/20 Vol. E75-C No. 10 pp. 1267-1274 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: array architecture, dynamic memory, high speed access, wide operating margin, low power dissipation,
	Summary \| Full Text:PDF (585.2KB)